TAZ-TFG-2018-1429


FPGA-based Accelerators for cryptography

Edo Vivancos, Isak
Nannarelli, Alberto (dir.)

Suárez Gracia, Darío (ponente)

Universidad de Zaragoza, EINA, 2018
Departamento de Informática e Ingeniería de Sistemas, Área de Arquitectura y Tecnología de Computadores

Graduado en Ingeniería Informática

Resumen: Cryptography involves mathematical theory and encryption meth- ods. Cryptography algorithms are designed around computational hardness assumptions. This leads to heavy computational intensive algorithms. Sometimes a software approach could not be enough, but a hardware approach could be very complex. In this project, we present a halfway between software and hardware approach using an FPGA. The intended outcome of the project is the design and development of two hardware-based accelerators for cryptography that can be dynamically loaded into the FPGA. Mul- tiple approaches are presented during the project in order to design and test the accelerators.

Tipo de Trabajo Académico: Trabajo Fin de Grado

Creative Commons License



El registro pertenece a las siguientes colecciones:
Trabajos académicos > Trabajos Académicos por Centro > Escuela de Ingeniería y Arquitectura
Trabajos académicos > Trabajos fin de grado



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